
Job Description :
1.Design and Verification of Power
Management modules like LDO, DCDC sub-modules, Bandgaps, Temperature sensor,
POR etc for SOC.
2.Also needs to interact with
Layout Engineer for proper Layout closure.
Educational Qualification :
Graduates
Experience : Freshers
Location : Hyderabad
Desired Profile :
1.Strong in CMOS basics, Network
Analysis, Control System.
2.Good analog circuit design
knowledge and hands-on design experience of analog macros like Amplifiers,
Comparator, Voltage regulators etc.
3.Reasonable knowledge on Analog
Layout.
4.Hands on experience with Cadence
Spectre/Spice, Virtuoso, Extraction tools etc.
5.High level of commitment.
6.Good Analytical and Debugging
skills.
7.Good Communication skills.
8.Good scripting and automation
skills( perl, tcl ) would be added advantage