Job Description:
1.Participates in the development
of Architecture and Micro-architecture specifications for the IP Logic
components. Performs logic design, Register Transfer Level (RTL) coding, and
simulations, designs functional units, and sub-systems for inclusion in full
chip designs.
2.Domain experience in
communication technologies, architecture model development, System-C Models,
Simulations for signal processing blocks. Deliver high quality designs with
focus on DSL, WLAN, Ethernet and Processor Subsystems, with challenging high
performance and low-power requirements.
3.Good communication and
presentation skills for effective team collaboration and external groups.
Hard-working, self-motivated and fast learning abilities would be appreciated.
Educational Qualification :
Master’s degree in Electronics/Electrical Engineering,
Experience : Experienced
Location : Bangalore
Qualifications :
1.16+ years of industry experience
in digital design of complex SoC IP blocks and products
2.Candidate should possess strong
digital design and VLSI fundamentals with prior experience in IP design
activities.
3.Knowledge of VHDL, Verilog,
C/System-C/System-Verilog/Specman, micro-architecture development, Signal
processing, filters, data-path designs, communication systems & standards
(DSL, WLAN, Ethernet), processor IP cores (MIPS, ARC), high-speed interfaces
(USB, PCIe, DDR, xGMII) and ASIC design flow (RTL to GDS) would be desirable.