synopsys hiring experienced
candidates for R&D Engineer in 2016 at bangalore . Require qualification is B.Tech/M.
Tech in CS/EE. Interested candidates apply-online.
Roles and responsibility:
1.A person in the position would be
responsible for designing, developing, troubleshooting, debugging and
maintaining large and efficient software systems for technology mapping, logic
and timing optimization steps of the FPGA logic synthesis software.
2.The person is expected to
3.Gather requirement and functional
specifications, design and implement efficient data structures and algorithms
in C/C++.
4.Work with CAE team in test
planning, execution and customer support.
5.Maintain and support existing
product and features.
Educational Qualification :
B.Tech/M. Tech
Experience : Experienced
Location : Bangalore
The person is expected to have:
1.B.Tech/M. Tech in CS/EE from a
reputed institute.
2.5+ years of experience in
designing, developing and maintaining large EDA software.
3.Sound knowledge in data
structures, graph algorithms and C/C++ programming on Windows/Unix.
4.Familiarity in digital logic
design.
5.Familiarity with Verilog/VHDL RTL
level designs, timing constrains, static timing analysis.
6.Working knowledge of FPGA design
tools and flows is a plus.
Job Description :
1.Altera Mapper Developer - The
FPGA group in Synopsys delivers a number of products such as Synplify Pro,
Synplify Premier, ProtoCompiler, Certify and Identify.
2.These products are widely used in
the industry for implementation of FPGA designs, prototyping and debugging of
ASICs using FPGAs.
3.Looking for a R&D engineer in
Synplify mapper R&D team in Bangalore for the following role and with the
given background/skill sets.
